- First, CPU fetches the instruction addressed by the Program Counter (PC) to the Memory Address Register (MAR). At the end of fetch operation, PC will point to the address of the next instruction for the next cycle.
- Second, the instruction in the IR gets decoded by the decoder. Data required from the memory will be loaded to the Memory Data Register (MDR) via data bus.
- Execute the instruction
Friday, July 25, 2014
Operating system Day 10 Fetch-Decode-Execute CPU cycle
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